Synopsys VCS - HDL Simulator of System Verilog, Verilog, and VHDL for ASIC design and verification.

Expensify - Import expenses directly from a credit card to create free expense reports quickly. Approve reports online and reimburse directly to a checking account with one click.

Riviera-PRO - System Verilog, Verilog. VHDL, SystemC, HDL simulator targeting ASIC and large FPGA designs.

Spendesk - Smart spending solution for agile teams

Cadence Incisive - System Verilog, Verilog, VHDL, SystemC HDL Simulator for ASIC Design and Verification

Abacus - Expenses without the 'expense report'