Riviera-PRO VS Spendesk

Synopsys VCS - HDL Simulator of System Verilog, Verilog, and VHDL for ASIC design and verification.

Expensify - Import expenses directly from a credit card to create free expense reports quickly. Approve reports online and reimburse directly to a checking account with one click.

ModelSim - ModelSim-Altera Software

Abacus - Expenses without the 'expense report'

Cadence Incisive - System Verilog, Verilog, VHDL, SystemC HDL Simulator for ASIC Design and Verification

Fyle - Track expenses across devices on-the-go and maintain a central repository. With custom approval flows, automatic policy violation detection and an automated audit trail, be audit-ready at all times!