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5spice
Circuit Tree
CircuitLab
LTspice
gEDA Project
PSIM
ModelSim
Synopsys VCS
Riviera-PRO
Synopsys VCS
ModelSim
Cadence Incisive
VCS
ESO Scheduling
gEDA Project
Circuit Tree
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Circuit Tree - Design and order Boards in Minutes
Synopsys VCS - HDL Simulator of System Verilog, Verilog, and VHDL for ASIC design and verification.
CircuitLab - Sketch, simulate, and share your circuits, entirely in your browser -- no install required.
ModelSim - ModelSim-Altera Software
LTspice - LTspice® is a high performance SPICE simulation software, schematic capture and waveform viewer with enhancements and models for easing the simulation of analog circuits.
Cadence Incisive - System Verilog, Verilog, VHDL, SystemC HDL Simulator for ASIC Design and Verification